Your Cart

74HC138 SN74HC138N 3 to 8 Decoder/Demultiplexer

  • 74HCT138 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL).
  • 74HCT138 decoder accepts three binary weighted address inputs (A0, A1 and A3) and when enabled, provides 8 mutually exclusive active LOW outputs (Y0 to Y7).
  • 74HCT138 features three enable inputs: two active LOW (E1 and E2) and one active HIGH (E3). Every output is HIGH unless E1 and E2 are LOW and E3 is HIGH.
  • This multiple enable function allows easy parallel expansion of the 74HC138; 74HCT138 to a 1-of-32 (5 lines to 32 lines) decoder with just four 74HC138; 74HCT138 ICs and one inverter.
  • 74HCT138 can be used as an eight output demultiplexer by using one of the active LOW enable inputs as the data input and the remaining enable inputs as strobes. Permanently tie unused enable inputs to their appropriate active HIGH- or LOW-state.
  • 74HCT138 is identical to the 74HC238; 74HCT238 but has inverting outputs.

Write a review

Please login or register to review